100BASE-FX Link Integrity Test

The Fast Ethernet transceiver circuits (PHY) continually monitor the receive data path for activity as a means of checking that the link is working correctly. The signalling system used for 100BASE-FX segments is based on the ANSI FDDI signalling system, which sends signals continually, even during idle periods of no network traffic. Therefore, activity on the receive data path is sufficient to provide a continual check of link integrity.

Quick Reference Guide to 100BASE-FX - 09 SEP 95

[Next] [Previous] [Up] [Top] [Copyright] [Books About Ethernet]

Generated with CERN WebMaker